Erratic Bits Classification for Efficient Repair Strategies in Automotive Embedded Flash Memories

The automotive environment is particularly challenging in terms of requested reliability for electronic components. Flash memories commonly exploited in this framework are subject to this paradigm as well. In semiconductor memories erratic bits are infamously known as a major reliability threat to be handled by repair strategies which spans from static redundancy to dynamic correction codes. Both resources are limited in their amount and correction strength, therefore their usage must be properly tailored. In this work we propose a signature classification methodology for erratic bits that will help the choice of the best repair strategy for each bit, reducing when possible the usage of unnecessary correction resources. This methodology will also turn into a decrease of the chip error probability as demonstrated by an accurate modeling procedure

Modeling Erratic bits Temperature Dependency for Monte Carlo Simulation of Flash arrays

The erratic bits phenomenon has been extensively characterized in the last decade due to its massive burden on the performance and reliability of Flash memory devices. From a statistical standpoint, it has been possible to describe a Markov-chain-based model of this phenomenon in large arrays suitable forMonte Carlo simulation. This model, however, is based on the assumption of complete independence of the probabilistic parameters characterizing each erratic bit from the testing temperature. The goal of this letter is to provide, through the electrical characterization of NOR Flash arrays, the statistical tools necessary to perform a correct simulation of the erratic bits under different temperature conditions

Injection MOCVD of BaTiO3/SrTiO3 artificial superlattices

In this paper we report on the deposition of BST films and BaTiO3/SrTiO3 superlattices (BTO/STO) obtained by injection MOCVD. In a first time, BST films were deposited on various substrates such as LaAlO3(LAO), SrTiO3:Nb(STO:Nb) and Al2O3(0001), resulting in epitaxial films in the case of STO or LAO substrates and highly textured films in the case of Al2O3 substrates. The good crystallinity of the films obtained was evidenced using X-ray analysis. Concerning the dielectric properties of the BST films deposited on STO:Nb one can mention that the Tc values were found to be the same as those for bulk materials. Furthermore, the feasibility of BTO/STO multilayers on Al2O3 (0001) was investigated. The grown superlattices were (111) oriented, displaying good crystallinity

Exposing Reliability/Performance Trade-Off in Non-Volatile Memories through Erratic Bits Signature Classification

The erratic bits phenomenon in non-volatile memories (NVM) has been evidenced in several technologies as a main reliability detractor. Usually this issue is handled by repair strategies which spans from static redundancy to dynamic correction codes. This evidences a trade-off in reliability/performance domain that is due to the limitation in the repair resources amount and correction strength. In this work we expose this trade-off in different NVM technologies such as embedded NOR Flash and Phase Change Memories through an accurate EB testing, signature classification procedure, and Chip Failure Rate estimation